Boundary Scan Technology

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Introduction


'JTAG' is a very popular acronym in embedded electronics industry and identifies itself to Boundary Scan Technology and its applications. The term JTAG is a misnomer and any reference to it could mean one of the below depending on the context of its use by an engineer -

  • An implementation of IEEE 1149.x for Board Test, or Boundary Scan testing
  • Boundary Scan Implementation
  • An appliance used to program on board flash or eeprom devices on a circuit board
  • A hardware device used to debug microprocessor software
  • A hardware device used to test a board using Boundary Scan

all of the above are “correct”, and can be mapped fairly well to the IEEE 1149.x standard.

The IEEE 1149.x standard - defines the circuitry, (- a test access port and boundary-scan architecture for digital integrated circuits and for the digital portions of mixed analog/digital integrated circuits), that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards so as to provide standardized approaches to

  • testing the interconnections between integrated circuits once they have been assembled onto a printed circuit board or other substrate;
  • testing the integrated circuit itself; and
  • observing or modifying circuit activity during the component's normal operation.

This IEEE standard gets identified as 'Boundary Scan' or 'Boundary Scan Technology' by virtue of the architecture that it defined for the purpose.

The acronym JTAG gets associated with Boundary Scan Technology or the IEEE 1149.x standard, as this standard had its genesis from the recommendations of the Joint Test Access Group (JTAG). JTAG was a group of test engineers, from world over, who got together to address then problem of limited access on printed circuit boards and testing circuits and their recommendations aggregated to became an IEEE Standard - 1149.1-1990 that got published in 1990.

This technique of boundary scan soon found niche applications from its original intention in a variety of ad-hoc manners - to test and debug processes and programming of devices such as memories, complex programmable logic devices (CPLDs) and Field-programmable gate arrays (FPGAs), to access embedded instruments such as built-in self-test (BIST) engines, complex I/O characterization, and embedded timing instruments that are embedded inside Integrated Circuits(IC's) for design validation after they have been soldered to a circuit board.

The technology behind all vendor tools available in the market that (1) debug software applications on hardware (2) debug printed circuit boards for interconnect and assembly faults (3) flash/FPGA/CPLD programming and (4) does embedded Instrumentation is Boundary scan

This technology has immense and undisputed relevance in development of reliable embedded electronics, yet this technology has remained untaught, outside of academic curriculum. Boundary scan technology training helps bridge the technology disconnect of having to use the technology driven tools without knowing the technology itself. This training enables students and professionals deep with the technology so as to effectively use it in the processes that use boundary scan technology. Our consultancy services enable optimised development of test strategies and design for test (DFT) methodologies from the perspective of automated testing and production of integrated chips and hardware boards.

Boundary Scan Technology Applications


On-Chip application code Debug

 

Non - Invasive PCB Debug and Test

 

Programming FLASH / CPLD / FPGA

 

Embedded Instrumentation

 

Our Services


Consulting

Debugging, Programming and Embedded Instrumentation

As the line between hardware and software continues to blur and the use of embedded systems in mission and time critical applications where safety and reliability are top priorities an efficient debug at the hardware/software interface draws eminent attention. Debugging has become critical for delivering reliable products successfully and calls for full understanding of what is happening in the processor, as well as in the device registers, memory maps, and bus accesses that connect the processor to the peripherals, not to mention the internal state of these peripherals.

Debug SetupDebug process has undergone a paradigm change and no more discriminates between device, board, code, core and Operating System and all of them remain intertwined and heavily interdependent.Scenarios of device being used to debug boards, boards being used to debug populated devices with and code running on the devices and embedded instrumentation makes the debug process a hard one.

On board programming of devices (flash/FPGA/CPLD) is another application that uses the access part of Boundary Scan technology.

Non-intrusive board test (NBT) that employs embedded instrumentation is enabled by boundary scan technology in providing the infrastructure for accessing and operating the embedded instruments. These embedded instruments may function inside the chip or across on-board chip-to-chip interconnects to validate the performance and functionality of a circuit board design before it moves into volume production. Embedded Instrumentation offers some test methodologies like High-speed I/O (HSIO) that is used to validate signal integrity on the high-speed buses in the Intel® Architecture (IA), Processor-controlled test (PCT) takes advantage of the debug port on most processor chips and asserts test and diagnostic routines on other elements on the circuit board, such as devices and the chip-to-chip buses, FPGA-controlled test (FCT) temporarily embedded instruments into a field programmable gate array (FPGA) device on a circuit board to accomplish FCT tests.

Also there are eminent needs to automate debugging and programming requirements together in a production line that necessitates integration of versatile tools to achive the purpose.

So the question is - what type of debug is required for your system and what debug method suits you ? which vendor tool is just right ?

Our boundary scan expertise help you to levarage the interdependencies of debug to optimize and scale a debug solution that is just right for you.
Our familiarity and exposure to most of the leading boundary scan based debug tools and other test methodologies help you to quickly choose from the broad spectrum of boundary scan based debug tools available in the market. that offer different and multiple debug capabilities and augment it with other test methodologies for an integrated test plaform that is complete

Consult us for your debug (test) / programming requirements

Training

Understanding Boundary Scan Technology is analogous to - knowing how your car works while you already know how to drive it.

The vendors who have developed boundary scan based debug tools have perfected Boundary Scan technology in their state-of-the-art tools leaving little or no need to know about the technology to use them for the purspose of debug. Most of the debug tools have abstracted the technology with a set of conveniences and automated the mundane use of the technology as like in a car - all that you need to drive a car is to know how to drive and a bit of practice ! But it begins to matter when you get stuck with your car say you have its temperature rising above the limits - then you wish you known what's wrong and where to look for the trouble and knew how to control it !

So as a test and debug engineer knowing boundary scan technology comes to your rescue giving you the ultimate confidence to use these debug tools and you will be able to interpret raw input and output vectors. There is lot of power when you know what you are doing though you don't have to put to use what is learned !

As boundary scan technology is about accessing a device ( microprocessor / microcontroller) for whatever application the access may be used for, be it for debugging application software on hardware, Flash/FPGA/CPLD programming, PCB debug, knowing the boundary scan architecture helps in designing chips and hardware boards that have higher degrees of testability(DFT).

We offer training on Boundary Scan technology, its architecture, as to how its used in few applications like debugging software code on hardware, debugging PCB hardware faults, Memmory testing and using Embedded Instruments

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Ecosystem Events


Boundary Scan Architecture illustrated


Boundary Scan implementation in a device
Boundary Scan device implementation detailed
Tap Controller State Diagram of the 16 State Finite State Machine(Moore Machine)

A Printed Circuit board with boundary scan implemented

Fast Access Controller™


Speed Flash Programming and Memory Testing with the Fast Access Controller™

Intellitech

The FAC is a patented plug-and-play IP solution for processor (Micro-controller, DSP or CPU), FPGA Users and ASIC/SoC designers who need to respond to customer demands for better Design-for-Test and improved support for programming external FLASH in a production environment.

Intellitech's patented technology delivers the world's fastest on-board FLASH and non-volatile memory programming. There is no need to perform stand-alone or in-line device programming in order to achieve the optimum programming speeds.

FAC configurations



The FAC IP achieves its fast on-board FLASH programming times by using advanced data de-serialization and protocol optimization algorithms to minimize the number of scan operations and data required during FLASH programming. This enables the FAC to program FLASH devices in-system over the standard 1149.1 bus at speeds equivalent to off-board programming.

Read more about Intellitech Products - Fast Access Controller

SystemBIST™


Flexible FPGA configuration for Xilinx and Altera FPGAs with Security and PCB BIT (Built-in-Test) Capability

Intellitech

SystemBIST™ is a complete plug-and-play IC for flexible FPGA configuration and embedded JTAG test built upon several unique patented architectures. SystemBIST™ is a code-less configuration device which enables design engineers to build high quality, self-testable and in-the-field re-configurable products. SystemBIST is vendor independent and can configure any IEEE 1532 or IEEE 1149.1 compliant FPGA. System CPLDs, EEPROMs and FLASH can also be re-programmed in the field with SystemBIST through other members of Intellitech's TEST-IP family. Intellitech SystemBIST

SystemBIST also provides the worlds first deterministic BIST (Built-In Self Test) for PCBs and entire systems. SystemBIST BIST removes much of the work required for a system level BIT (Built-In-Test) created with firmware/software.

SystemBIST re-uses the manufacturing JTAG/IEEE 1149.1 based test patterns and scripts and embeds them in the PCB. The tests and FPGA configuration choices are stored compressed in FLASH memory enabling PCBs to be tested anywhere that they can be powered.

Read more about Intellitech Products - Eclipse

1149.1 Boundary Scan Test Development Software


Intellitech's Boundary Scan software is called the Eclipse Test Development Environment. The Eclipse™ Boundary Scan Test Development System is a Complete Solution for Test, Debug and In-System Configuration of Boundary Scan (IEEE 1149.1/JTAG) based PCB’s and Systems.

Intellitech

Eclipse Test Development EnvironmentThe Eclipse TDE is part of a holistic solution that provides all the features that are required to test ‘real world’ printed circuit boards. This includes important essential capabilities such as
  • boundary scan 1149.1 IC to IC interconnect testing
  • Memory interconnect testing
  • On-board FLASH programming
  • In-system programming for FPGAs
  • CPLD programming
  • Schematic based debugging
  • Robust pin level diagnostics
  • open-source JTAG scan scripting
  • LabView JTAG VIs and built-in PXI/VXI/GPIB instrument support
Eclipse scales to any size design that conforms to the JTAG/1149.1 standard. Have a small PCB with a few BGA devices? Prices start at $895.00 for Eclipe "small PCB".

Read more about Intellitech Products - Eclipse

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PT100 - Concurrent Boundary Scan (CJTAG) for Burn-in or Production


PT100 Parallel Tester - Industry's highest throughput digital test and configuration tester

Intellitech

The PT100 Parallel Tester enables high throughput PCB digital test, on-board FLASH and CPLD programming while keeping up with modern production line rates of one PCB every 20 to 40 seconds.

PT100 -Concurrent Boundary Scan for Burn-in or Production

The PT100 is a key element in any modern CM or EMS manufacturing line. As test time and in-system configuration times continue to increase, the PT100 can keep up with the fastest production line without sacrificing on product test quality or resorting to pre-programming non-volatile parts.

The PT100 Parallel Tester is designed to off-load in-circuit testers and in-line programmers and optimize throughput of digital test and configuration of PCBs incorporating the IEEE 1149.1 standard. It is ideal for testing large FPGA based PCBs with moderate to large amounts of FLASH memory or panelized PCBs with 8, 16, 32 or more circuits per panel.

Read more about Intellitech Products - PT100 Parallel Tester

JAF Pro - Production PCB Combinational Tester


The JAF Pro combines ARM Functional Test, Analog Test and Boundary Scan in one platform for testing up to 32 PCBs at a time.

Intellitech

The JAF Pro solves the test challenges and cost requirements of testing small, high-volume PCBs used in the home, mobile, entertainment, automotive and embedded markets. PCBs in these markets are cost sensitive yet require high volume, high fault coverage on leading edge technologies such as WiFi, DDR Memory, USB, Bluetooth, Nand Flash, MPEG decoders, Power Management Units, and MMC/Smart Cards interfaces. JAF PRO Miniaturization makes traditional test point access to both digital and analog nets difficult or impossible.

The JAF Pro is targeted for small, low power PCBs that have one or more ARM® based processors. ARM based processors make up about 75% of all 32 bit processors sold and exist in 95% of all cell phones. The manufacturing volumes in this category of PCBs prohibit single boundary-scan or single emulation controller approaches to test.

Read more about Intellitech Products - JAF Pro

Develop - Simulate - Validate JTAG/IJTAG Silicon Instruments using NEBULA


Intellitech

Nebula

You can register here to download NEBULA 6.11. This is not a trial software or an evaluation, it is free to use.

Read more about Intellitech Products - Nebula

Test Development and Engineering Services


Intellitech

Intellitech has a very experienced consulting and test development organization that is dedicated to provide our customers with high-quality design and test services.

Intellitech consulting engineers will assist you in Design-for-Test implementation, production test solution, BSDL Verification, Test program development and manufacturing test deployment. Intellitech engineers have a wide industry experience in telecommunications, aerospace, consumer products, automotive and blade servers and can offer you expertise in the industry's best practices at the lowest cost.

Read more about Intellitech Products - Nebula